A defining theme of deep tech investing in 2025 is that Generative AI is creating the need for new hardware architectures in nearly every part of the stack. The scale and pace of this compute transformation is breathtaking and showing no signs of slowing down.

Accelerated compute has shifted workloads from CPUs to GPUs and AI ASICs (collectively XPUs). The need for large clusters of accelerators drives the massive demand for new solutions in scale up and scale out networking like that of Upscale AI.

But the biggest constraint on the growth of AI infrastructure is power. As Andy Jassy noted in the 3Q25 Amazon earnings call: “overall in the industry, maybe the bottleneck is power”. There is only so much power infrastructure that can be brought online each year and AI workloads are power hungry. This makes technology innovations in power delivery valuable and urgent.

XPUs are increasingly power dense. In the cloud era, the typical hyperscaler data center was predominantly CPUs with a Thermal Design Power (TDP) that topped out around ~300W. With the transition to accelerated compute and AI workloads, XPUs have blown past these levels, with newer generations approaching upwards of 2,000W and rumors of systems being designed today that would exceed 3,000W. For reference, a home space heater is 1,000-1,500W.

Beyond the absolute power needs, AI workload power demand is also spiky. Power consumption can fluctuate substantially based on the stage of computation. For example, during training, backpropagation typically consumes more power than the forward pass leading to spikes in power demand. Similarly, power needs during inference vary widely based on user inputs.

Incumbent power solutions rely on many discrete components like inductors and capacitors on board to handle voltage regulation. As you can see below, these consume precious area and, because they are lateral to the accelerator, currents travel along a long, resistive path. The result is latency, energy loss, and heat. 

The next frontier of power delivery is Integrated Voltage Regulation (IVR), placing voltage regulation directly in the package. The concept of IVR isn’t new, but it is an extremely difficult solution to deliver. IVR demands a rare combination of semiconductor and inductor process expertise, ability to design large scale high precision mix-signal circuitry, and an intimate understanding of power management and the behavior of ultra-high-power AI ASICs to carefully drive the interactions.

Even current power-delivery market leaders like Monolithic Power Systems have had issues delivering consistent solutions for such high-power operations. IVR is now coming to life with Celesta Capital’s newest investment: PowerLattice.

PowerLattice has designed a chiplet that integrates directly into existing System-on-a-Chip designs to deliver vertical voltage regulation. By tightly coupling power and compute, PowerLattice can:

• Reduce power delivery losses by up to 50%
• Dramatically reduces the required footprint
• React 100x faster than traditional DC-DC converters, ensuring stable operation during sudden current demands

The founding team Peng Zou, Gang Ren, and Sujith Dermal bring decades of relevant experience, including time at prior Celesta portfolio company Nuvia. Just as important, their execution in the time we have known them is in rare company in this industry.

It's increasingly clear that that the limiting factor on AI growth is not access to GPUs or capital, but rather power. Breaking through the power delivery wall is needed to continue to push forward AI technology without waiting on grid buildouts.

PowerLattice has created a solution that makes power delivery denser, faster, and far more efficient. We at Celesta Capital are proud to be co-leading their Series A. You can read more about the news here.